1. Field of the Invention
The present invention relates to an electronic circuit which can repeatedly set and maintain accumulation charge amounts of respective floating gates at respectively predetermined values, a differential amplification electronic circuit which can control threshold values at respectively predetermined values by using the electronic circuit, and an analog multiplication electronic circuit which can freely control multiplicaton factors by using the differential amplification electronic circuit.
2. Description of the Prior Art.
In analog multiplication circuit for performing a multiplicaton of A.times.B, when the circuit has a function for setting and maintaining the multiplication factor A at a predetermined value, it is possible to express a synapse connection in a nerve system of a living body in a form of an electronic circuit by using the analog multiplication circuit.
Generally, a nerve cell has a directional property, it transmits output of another cell on one side of the nerve cell to still another cell on the other side thereof. In this case, each cell multiplies input i1, i2, . . . in from several other cells shown in FIG. 1 by weight w1, w2, . . . wn to set weight on the input, thereafter the total sum of these products is obtained, then the output is finally determined in accordance with the result. Further, the output has a saturation characteristic at both the top and the bottom thereof.
The output of the nerve cell is expressed by the following equation: EQU output=f[.SIGMA.(weight).times.(input)]
where f is a monotonously increasing odd function having a saturation characteristic.
Namely, in the expression of the nerve cell in a form of an electronic circuit, a multiplication circuit for the analog input of (weight) and (input) is required.
Conventionally, as an analog multiplication circuit for such expression of the nerve cell in a form of an electronic circuit, a gilbert multiplier as shown in FIG. 2 is well known.
In the conventional analog multiplication circuit, the respective source ends of a pair of a first and a second transistor Q1, Q2 are commonly connected to a first terminal N1 to compose a first differential couple, and a current source S is also connected to the first terminal N1. While, the respective source ends of a pair of a third and a fourth transistor Q3, Q4 are commonly connected to a second terminal N2 to compose a second differential couple, and the respective source ends of a pair of a fifth and a sixth transistor Q5, Q6 are commonly connected to a third terminal N3 to compose a third differential couple. Moreover, the second terminal N2 is connected to the drain end of the first transisitor Q1 and the third terminal N3 is connected to the drain end of the second transistor Q2. The drain ends of the third and the fifth transistor Q3, Q5 are commonly connected to the fourth terminal N4, and a power source E is also connected to the fourth terminal N4 through a resistor R1. Furthermore, the drain ends of the fourth and the sixth transistor Q4, Q6 are commonly connected to the fifth terminal N5, and the power source E is also connected to the fifth terminal N5 through a resistor R2. The normal gate end of the first transistor Q1 is connected to a first positive input terminal IN11, and the normal gate end of the second transistor Q2 is connected to a first negative input terminal IN12. Further, the normal gate ends of the third and the sixth transistor Q3, Q6 are commonly connected to a second positive input terminal IN12, and the normal gate ends of the fourth and the fifth transistor Q4, Q5 are commonly connected to a second negative input terminal IN22. Moreover, a fifth terminal N5 is connected to a positive output terminal OT1, and a fourth terminal N4 is connected to a negative output terminal OT2.
In the conventional analog multiplication circuit having such composition, a multiplication result between first input which is complementary signal given to the first positive input terminal IN11 and the first negative input terminal IN12 and second input which is another complementary signal given to the second positive input terminal IN21 and the second negative input terminal IN22 appears as a complementary output at the positive output terminal OT1 and the negative output terminal OT2.
Accordingly, the conventional analog multiplication circuit can perform the multiplication of (weight).times.(input), however, when the first input to the input terminals IN11, IN12 is removed, the influence appears on the output terminals OT1, OT2, so that the multiplication result is changed immediately.
Moreover, though the weight in the nerve cell is changed on a learning state and maintained for a long time in a store state in general, and the function is necessary for the expression of the nerve cell in a form of a electronic circuit, it is difficult for the gilbert multiplier to change the weight of learning and maintain it on storage.
While, in the prior art, a storage circuit including a transistor having a floating gate is known as a circuit for changing the state and maintaining it after changed.
FIG. 3 is a compositional cross sectional diagram of a transistor having such a floating gate. The transistor has a source end S, a drain end D and a control gate end G on a p-type substrate P thereon, and a floating gate FG extremely close to the substrate P as an interval of, for example, about 100 .ANG..
In case of the transistor, storage of information is carried out as follows. When the source end S is earthed, and the control gate end G is applied with a high voltage, electrons move from the source end S to the floating gate FG. This is a tunnel current called a Fowler-Nordheim current. Accordingly, the floating gate FG is charged negatively, and a phenomenon equivalent to that threshold values of a MOS transistor composed of the control gate end G, the source end S and the drain end D are increased appears. Generally, even in the case that the source end S and the control gate end G are returned into a normal voltage condition, the threshold values are maintained for a long time.
While, when a high voltage is applied to the source end S, and the control gate end G is earthed, the Fowler-Nordheim current flows in the reverse direction to that mentioned above, so that electrons can be pulled out from the floating gate FG. Accordingly, the threshold values of the MOS transistor composed of the control gate end G, the source end S and the drain end D are decreased.
However, the transistor having such a floating gate is used only for a memory integrated circuit called EEPROM capable of rewriting and a process to correct scattering of the threshold values of a MOS transistor caused on production thereof, in which transistors Tr1, Tr2 having a pair of floating gates FG12 are used so that an accumulation charge amount of the floating gate FG12 is controlled by the transistor Tr1 to change the threshold value of the other transistor Tr2, as shown in FIG. 4.
As stated above, in the conventional analog multiplication circuit having composition like a nerve cell expressed in a form of an electronic circuit, such an electronic circuit that can set and maintain the weight at a predetermined value, further repeatedly perform operation for setting and maintaining the value is not known. Moreover, as an example in which the transistor having the floating gate is used for multiplication operation in the synapse [1], [2], only the conventional examples shown in FIGS. 3 and 4 are known.
[1] U. Ruckert and K. Goser, "VLSI Architectures for Assosiative Networks", INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS PROCEEDINGS Volume 1 of 3, Jun. 7-9, 1988, pp. 755-758, IEEE. PA0 [2] Mark Holler, Simon Tam, Hernan Castro, Ronald Benson, "An Electrically Trainable Artifical Neural Network (ETANN) with 10240 `Floating Gate` Synapses", IJCNN INTERNATIONAL JOINT CONFERENCE ON NEURAL NETWORKS, pp. II-191-II-196IEEE, 1989.